Programmable memory circuits have been developed from the basic ROM (Read Only Memory) including the PROM (Programmable Read Only Memory: OR terms field programmable and AND terms fixed), EPROM (Electrically Programmable Read Only Memory: OR terms field programmable and AND terms fixed), and EEPROM (Electrically Erasable Programmable Read Only Memory: OR terms field programmable).
Likewise, many types of integrated circuit programmable logic devices have been developed. Early types of programmable logic devices included PLAs (Programmable Logic Arrays: AND and OR terms factory programmable) that are mask-programmable, and FPLAs (Field Programmable Logic Arrays: AND and OR terms field programmable) that can be programmed in the field instead of at manufacture. Other types of programmable logic arrays that have evolved include HAL (Hardware Array Logic: AND terms factory programmed, OR terms fixed), IFL (Integrated Fused Logic: AND and OR terms field programmable), FPLS (Field Programmable Logic Sequencer: AND and OR terms field programmable with output to input feedback), FPGA (Field Programmable Gate Array: AND terms field programmable and no OR terms), EPLD (Electrically Programmable Logic Devices: EPROM Cell), EEPLD/PEEL (Electrically Erasable Programmable Logic Devices: EEPROM Cell), and GAL (Generic Array Logic: AND terms field programmable, fixed OR array--EEPROM Cell).
However, most of the above programmable logic devices do not provide a programmable logic array in which both the AND and OR functions may be programmed and reprogrammed in the field.
Of the above types of PLDs, only the EPLDs may have both the AND and OR terms programmed and reprogrammed electrically without a definite erasing step. One type of device that provides this capability is described in "An Alterable Programmable Logic Array", IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol. SC-20, No. 5, page 1061, October 1985. An NMOS alterable programmable logic array performs the same logical function as a standard programmable logic device, but can be programmed and reprogrammed electrically to change the logic function. However, this alterable programmable logic array requires a refresh cell for each row and column and is slow due to the capacitance within the MOS circuitry.
Thus, what is needed is a bipolar writable logic array that may be quickly programmed and reprogrammed electrically.